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W631GG6KB
8.18.2 ZQ Calibration Timing
T0
T1
Ta0
Ta1
Ta2
Ta3
Tb0
Tb1
Tc0
Tc1
Tc2
CK#
CK
Command
ZQCL
NOP
NOP
NOP
VALID
VALID
ZQCS
NOP
NOP
NOP
VALID
Address
A10
VALID
VALID
VALID
VALID
VALID
VALID
CKE
ODT
*1
*2
VALID
VALID
VALID
VALID
*1
*2
VALID
VALID
DQ Bus
*3
Hi-Z
ACTIVITIES
*3
Hi-Z
ACTIVITIES
t ZQinit or t ZQoper
t ZQCS
TIME BREAK
DON'T CARE
Notes:
1. CKE must be continuously registered high during the calibration procedure.
2. On-die termination must be disabled via the ODT signal or MRS during the calibration procedure.
3. All devices connected to the DQ bus should be high impedance during the calibration procedure.
Figure 72 – ZQ Calibration Timing
8.18.3 ZQ External Resistor Value, Tolerance, and Capacitive loading
In order to use the ZQ Calibration function, a 240 ohm ± 1% tolerance external resistor must be
connected between the ZQ pin and ground. The single resistor can be used for each SDRAM or one
resistor can be shared between two SDRAMs if the ZQ calibration timings for each SDRAM do not
overlap. The total capacitive loading on the ZQ pin must be limited (See section 10.11 “ Input/Output
Capacitance ” on page 120).
Publication Release Date: Dec. 09, 2013
Revision A05
- 78 -
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